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(R)
TDA7296S
60V - 60W DMOS AUDIO AMPLIFIER WITH MUTE/ST-BY
VERY HIGH OPERATING VOLTAGE RANGE (30V) DMOS POWER STAGE HIGH OUTPUT POWER (THD = 10%, UP TO 60W) MUTING/STAND-BY FUNCTIONS NO SWITCH ON/OFF NOISE VERY LOW DISTORTION VERY LOW NOISE SHORT CIRCUIT PROTECTION THERMAL SHUTDOWN CLIP DETECTOR MODULARITY (MORE DEVICES CAN BE EASILY CONNECTED IN PARALLEL TO DRIVE VERY LOW IMPEDANCES) DESCRIPTION The TDA7296S is a monolithic integrated circuit in Multiwatt15 package, intended for use as audio class AB amplifier in Hi-Fi field applications (Home Stereo, self powered loudspeakers, TopFigure 1: Typical Application and Test Circuit MULTIPOWER BCD TECHNOLOGY
Multiwatt15 ORDERING NUMBER: TDA7296SV
class TV). Thanks to the wide voltage range and to the high out current capability it is able to supply the highest power into both 4 and 8 loads. The built in muting function with turn on delay simplifies the remote operation avoiding switching on-off noises. Parallel mode is made possible by connecting more device through of pin11. High output power can be delivered to very low impedance loads, so optimizing the thermal dissipation of the system.
C7 100nF R3 22K C2 22F +Vs R2 680 C1 470nF IN2 7 BUFFER DRIVER 11
+Vs
C6 1000F
+PWVs 13 14 OUT BOOT LOADER C5 22F 6 5 BOOTSTRAP CLIP DET VCLIP (*)
IN+
3
+ 12
R1 22K SGND (**) VMUTE R5 10K MUTE 10 MUTE VSTBY R4 22K 1 STBY-GND C3 10F C4 10F 8 -Vs C9 100nF -Vs 15 -PWVs C8 1000F STBY 9 STBY THERMAL SHUTDOWN S/C PROTECTION 4
D97AU805A
(*) see Application note (**) for SLAVE function
June 2000
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TDA7296S
PIN CONNECTION (Top view)
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 -VS (POWER) OUT +VS (POWER) BOOTSTRAP LOADER BUFFER DRIVER MUTE STAND-BY -VS (SIGNAL) +VS (SIGNAL) BOOTSTRAP CLIP AND SHORT CIRCUIT DETECTOR SIGNAL GROUND NON INVERTING INPUT INVERTING INPUT STAND-BY GND
TAB CONNECTED TO PIN 8
D97AU806
QUICK REFERENCE DATA
Symbol VS GLOOP Ptot SVR Parameter Supply Voltage Operating Closed Loop Gain Output Power Supply Voltage Rejection VS = 30V; RL = 8; THD = 10% VS = 25V; RL = 4; THD = 10% Test Conditions Min. 12 26 60 60 75 Typ. Max. 30 40 Unit V dB W W dB
ABSOLUTE MAXIMUM RATINGS
Symbol VS V1 V2 V2 - V3 V3 V4 V5 V6 V9 V10 V11 V12 IO Ptot Top Tstg, Tj Parameter Supply Voltage (No Signal) VSTAND-BY GND Voltage Referred to -VS (pin 8) Input Voltage (inverting) Referred to -VS Maximum Differential Inputs Input Voltage (non inverting) Referred to -VS Signal GND Voltage Referred to -VS Clip Detector Voltage Referred to -VS Bootstrap Voltage Referred to -VS Stand-by Voltage Referred to -VS Mute Voltage Referred to -VS Buffer Voltage Referred to -VS Bootstrap Loader Voltage Referred to -VS Output Peak Current Power Dissipation Tcase = 70C Operating Ambient Temperature Range Storage and Junction Temperature Value 35 60 60 30 60 60 60 60 60 60 60 60 10 50 0 to 70 150 Unit V V V V V V V V V V V V A W C C
THERMAL DATA
Symbol Rth j-case 2/11 Description Thermal Resistance Junction-case Typ 1 Max 1.5 Unit C/W
TDA7296S
ELECTRICAL CHARACTERISTICS (Refer to the Test Circuit VS = 24V, RL = 8, GV = 30dB; Rg = 50 ; Tamb = 25C, f = 1 kHz; unless otherwise specified).
Symbol VS Iq Ib VOS IOS PO Parameter Operating Supply Range Quiescent Current Input Bias Current Input Offset Voltage Input Offset Current RMS Continuous Output Power d = 0.5%: VS = 24V, R L = 8 VS = 21V, R L = 6 VS = 18V, R L = 4 d = 10%; RL = 8 ; VS = 30V RL = 6 ; VS = 24V RL = 4; VS = 23V PO = 5W; f = 1kHz PO = 0.1 to 20W; f = 20Hz to 20kHz VS = 18V, R L = 4: PO = 5W; f = 1kHz PO = 0.1 to 20W; f = 20Hz to 20kHz SR GV GV eN fL, fH Ri SVR TS VST on VST off ATTst-by Iq st-by VMon VMoff ATTmute Slew Rate Open Loop Voltage Gain Closed Loop Voltage Gain Total Input Noise Frequency Response (-3dB) Input Resistance Supply Voltage Rejection Thermal Shutdown f = 100Hz; Vripple = 0.5Vrms A = curve f = 20Hz to 20kHz PO = 1W 100 60 75 150 24 7 27 27 27 30 30 30 60 60 60 0.005 0.1 0.01 0.1 10 80 30 1 2 40 5 Test Condition Min. 10 20 30 Typ. Max. 30 60 500 10 100 Unit V mA nA mV nA W W W W W W % % % % V/s dB dB V V k dB C 1.5 3.5 70 90 1 3 1.5 3.5 60 80 V V dB mA V V dB
Music Power (RMS) (*) t = 1s
d
Total Harmonic Distortion (**)
20Hz to 20kHz
STAND-BY FUNCTION (Ref: -VS or GND) Stand-by on Threshold Stand-by off Threshold Stand-by Attenuation Quiescent Current @ Stand-by Mute on Threshold Mute off Threshold Mute Attenuation
MUTE FUNCTION (Ref: -VS or GND)
Note (**): MUSIC POWER is the maximal power which the amplifier is capable of producing across the rated load resistance (regardless of non linearity) 1 sec after the application of a sinusoidal input signal of frequency 1KHz. Note (**): Tested with optimized Application Board (see fig. 2)
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TDA7296S
Figure 2: Typical Application P.C. Board and Component Layout (scale 1:1)
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TDA7296S
APPLICATION SUGGESTIONS (see Test and Application Circuits of the Fig. 1) The recommended values of the external components are those shown on the application circuit of Figure 1. Different values can be used; the following table can help the designer.
COMPONENTS R1 (*) R2 R3 (*) R4 SUGGESTED VALUE 22k 680 22k 22k PURPOSE INPUT RESISTANCE LARGER THAN SUGGESTED INCREASE INPUT IMPEDANCE SMALLER THAN SUGGESTED DECREASE INPUT IMPEDANCE
CLOSED LOOP GAIN DECREASE OF GAIN INCREASE OF GAIN SET TO 30dB (**) INCREASE OF GAIN DECREASE OF GAIN ST-BY TIME CONSTANT MUTE TIME CONSTANT INPUT DC DECOUPLING FEEDBACK DC DECOUPLING MUTE TIME CONSTANT ST-BY TIME CONSTANT BOOTSTR APPING LARGER MUTE ON/OFF TIME LARGER ST-BY ON/OFF TIME LARGER ST-BY ON/OFF TIME LARGER MUTE ON/OFF TIME SMALLER ST-BY ON/OFF TIME; POP NOISE SMALLER MUTE ON/OFF TIME HIGHER LOW FREQUENCY CUTOFF HIGHER LOW FREQUENCY CUTOFF SMALLER MUTE ON/OFF TIME SMALLER ST-BY ON/OFF TIME; POP NOISE SIGNAL DEGRADATION AT LOW FREQUENCY
R5 C1
10k 0.47F
C2
22F
C3 C4
10F 10F
C5
22FXN (***)
C6, C8 C7, C9
1000F 0.1F
SUPPLY VOLTAGE BYPASS SUPPLY VOLTAGE BYPASS DANGER OF OSCILLATION
(*) R1 = R3 for pop optimization (**) Closed Loop Gain has to be 26dB (***) Multiply this value for the number of modular part connected
Slave function: pin 4 (Ref to pin 8 -VS)
-VS +3V
MASTER
-VS +1V
UNDEFINED
Note: If in the application, the speakers are connected via long wires, it is a good rule to add between the output and GND, a Boucherot Cell, in order to avoid dangerous spurious oscillations when the speakers terminal are shorted. The suggested Boucherot Resistor is 3.9/2W and the capacitor is 1F.
-VS
SLAVE
D98AU821
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TDA7296S
INTRODUCTION In consumer electronics, an increasing demand has arisen for very high power monolithic audio amplifiers able to match, with a low cost, the performance obtained from the best discrete designs. The task of realizing this linear integrated circuit in conventional bipolar technology is made extremely difficult by the occurence of 2nd breakdown phoenomenon. It limits the safe operating area (SOA) of the power devices, and, as a consequence, the maximum attainable output power, especially in presence of highly reactive loads. Moreover, full exploitation of the SOA translates into a substantial increase in circuit and layout complexity due to the need of sophisticated protection circuits. To overcome these substantial drawbacks, the use of power MOS devices, which are immune from secondary breakdown is highly desirable. 1) Output Stage The main design task in developping a power operational amplifier, independently of the technology used, is that of realization of the output stage. The solution shown as a principle shematic by Fig3 represents the DMOS unity - gain output buffer of the TDA7296S. This large-signal, high-power buffer must be capable of handling extremely high current and voltage levels while maintaining acceptably low harmonic distortion and good behaviour over frequency response; moreover, an accurate control of quiescent current is required. A local linearizing feedback, provided by differential amplifier A, is used to fullfil the above requirements, allowing a simple and effective quiescent current setting. Proper biasing of the power output transistors alone is however not enough to guarantee the absence of crossover distortion. While a linearization of the DC transfer characteristic of the stage is obtained, the dynamic behaviour of the system must be taken into account. A significant aid in keeping the distortion contributed by the final stage as low as possible is provided by the compensation scheme, which exploits the direct connection of the Miller capacitor at the amplifier's output to introduce a local AC feedback path enclosing the output stage itself. 2) Protections In designing a power IC, particular attention must be reserved to the circuits devoted to protection of the device from short circuit or overload conditions. Due to the absence of the 2nd breakdown phenomenon, the SOA of the power DMOS transistors is delimited only by a maximum dissipation curve dependent on the duration of the applied stimulus. In order to fully exploit the capabilities of the power transistors, the protection scheme implemented in this device combines a conventional SOA protection circuit with a novel local temperature sensing technique which " dynamically" controls the maximum dissipation. In addition to the overload protection described
Figure 3: Principle Schematic of a DMOS unity-gain buffer.
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TDA7296S
Figure 4: Turn ON/OFF Suggested Sequence
+Vs (V) +40
-40
-Vs VIN (mV)
VST-BY PIN #9 (V)
5V
VMUTE PIN #10 (V)
5V
IQ (mA)
VOUT (V)
OFF ST-BY PLAY MUTE MUTE
D98AU817
ST-BY
OFF
above, the device features a thermal shutdown circuit which initially puts the device into a muting state (@ Tj = 150 oC) and then into stand-by (@ Tj = 160 oC). Full protection against electrostatic discharges on every pin is included. Figure 5: Single Signal ST-BY/MUTE Control Circuit
avoid any kind of uncontrolled audible transient at the output. The sequence that we recommend during the ON/OFF transients is shown by Figure 4. The application of figure 5 shows the possibility of using only one command for both st-by and mute functions. On both the pins, the maximum applicable range corresponds to the operating supply voltage. APPLICATION INFORMATION
MUTE MUTE/ ST-BY
20K 10K 30K
STBY
1N4148
10F
10F
D93AU014
3) Other Features The device is provided with both stand-by and mute functions, independently driven by two CMOS logic compatible input pins. The circuits dedicated to the switching on and off of the amplifier have been carefully optimized to
BRIDGE APPLICATION Another application suggestion is the BRIDGE configuration, where two TDA7296S are used. In this application, the value of the load must not be lower than 8 Ohm for dissipation and current capability reasons. A suitable field of application includes HI-FI/TV subwoofers realizations. The main advantages offered by this solution are: - High power performances with limited supply voltage level. - Considerably high output power even with high load values (i.e. 16 Ohm). With Rl= 8 Ohm, Vs = 23V the maximum output power obtainable is 120W (Music Power)
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TDA7296S
APPLICATION NOTE: (ref. fig. 7) Modular Application (more Devices in Parallel) The use of the modular application lets very high power be delivered to very low impedance loads. The modular application implies one device to act as a master and the others as slaves. The slave power stages are driven by the master device and work in parallel all together, while the input and the gain stages of the slave device are disabled, the figure below shows the connections required to configure two devices to work together. The master chip connections are the same as the normal single ones. The outputs can be connected together without the need of any ballast resistance. Figure 6: Modular Application Circuit
C7 100nF +Vs C6 1000F
The slave SGND pin must be tied to the negative supply. The slave ST-BY pin must be connected to ST-BY pin. The bootstrap lines must be connected together and the bootstrap capacitor must be increased: for N devices the boostrap capacitor must be 22F times N. The slave Mute and IN-pins must be grounded. THE BOOTSTRAP CAPACITOR For compatibility purpose with the previous devices of the family, the boostrap capacitor can be connected both between the bootstrap pin (6) and the output pin (14) or between the boostrap pin (6) and the bootstrap loader pin (12).
MASTER
C2 22F R2 680 C1 470nF R1 22K SGND VMUTE VSTBY R4 22K R5 10K MUTE STBY
R3 22K BUFFER DRIVER 7 11
+Vs IN2
+PWVs 13 14 OUT BOOT LOADER C10 100nF R7 2
IN+
3
+ 12
4 10 MUTE 9 STBY 1 C4 10F STBY-GND 8 -Vs C9 100nF THERMAL SHUTDOWN S/C PROTECTION 15 -PWVs C8 1000F -Vs +Vs C7 100nF C6 1000F 6 5
C5 47F BOOTSTRAP CLIP DET
C3 10F
+Vs IN2 7 -
BUFFER DRIVER 11
+PWVs 13 14 OUT BOOT LOADER
IN+
3
+ 12
SLAVE
SGND MUTE 4 10 9 STBY
MUTE STBY 1 STBY-GND 8 -Vs C9 100nF -Vs THERMAL SHUTDOWN S/C PROTECTION 15 -PWVs C8 1000F
6 5
BOOTSTRAP
D97AU808C
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TDA7296S
Figure 7a: Modular Application P.C. Board and Component Layout (scale 1:1) (Component SIDE)
Figure 7b: Modular Application P.C. Board and Component Layout (scale 1:1) (Solder SIDE)
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TDA7296S
mm MIN. TYP. MAX. 5 2.65 1.6 1 0.49 0.66 1.02 17.53 19.6 21.9 21.7 17.65 17.25 10.3 2.65 4.25 4.63 1.9 1.9 3.65 1.27 17.78 0.55 0.75 1.52 18.03 20.2 22.5 22.5 18.1 17.75 10.9 2.9 4.85 5.53 2.6 2.6 3.85 0.019 0.026 0.040 0.050 0.039 0.022 0.030 0.060 0.710 0.795 0.886 0.886 0.713 0.699 0.429 0.114 0.191 0.218 0.102 0.102 0.152 MIN. inch TYP. MAX. 0.197 0.104 0.063
DIM. A B C D E F G G1 H1 H2 L L1 L2 L3 L4 L7 M M1 S S1 Dia1
OUTLINE AND MECHANICAL DATA
0.690 0.700 0.772 0.862 0.854 0.695 0.679 0.406 0.104 0.167 0.182 0.075 0.075 0.144 0.874 0.870 0.689 0.421 0.179 0.200
22.2 22.1 17.5 10.7 4.55 5.08
Multiwatt15 V
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TDA7296S
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics (c) 2000 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A. http://www.st.com
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